1. Field of the Invention
The present invention generally relates to microcontrollers, and more particularly relates to a microcontroller which is installed in electronic equipment.
In recent years, there has been a growing demand for electronic products equipped with ever more sophisticated functions, so that various types of the electronic products now incorporate microcontrollers inside. Since these microcontrollers are required to satisfy various demands for the sophisticated functions, they need to be able to operate in various operation modes. Before implementing these microcontrollers inside the products, it is necessary to make a check to determine if the microcontrollers operate as designed in these various operation modes.
Also, the microcontrollers are incorporated into various portable equipment. Thus, some types of the microcontrollers are equipped with a function to halt operation during an idle time, in order to reduce consumption of electric power.
2. Description of the Prior Art
FIG. 1 and FIG. 2 show block diagrams of microcontrollers of the prior art.
In FIG. 1, a clock signal generated by a clock generation circuit 10 is supplied to an internal clock generation circuit 11. The internal clock generation circuit 11 generates various internal clock signals, and provides them for a logic operation circuit 12. A reset signal which holds "1" for a predetermined period of time is supplied externally to a node 15. A time length of the period in which the reset signal is 1 is elongated by a reset elongating circuit 16. Then, the elongated reset signal is provided for the logic operation circuit 12 to reset the same.
Mode signals indicating operation modes are supplied to nodes 17, 18, and 19, and, in turn, provided for latch circuits 20, 21, and 22, respectively. When the elongated reset signal is 1, the latch circuits 20 to 22 receive one of the internal clock signals from an AND circuit 23 so as to latch mode signals from the nodes 17 to 19, respectively. The mode signal from the node 19 indicates either a normal operation or a test operation, and is supplied to the logic operation circuit 12 as an output of the latch circuit 22. Also, the outputs of the latch circuit 20 to 22 are provided for and decoded at an operation mode selection circuit 24. Outputs of the operation mode selection circuit 24 control internal operations of the logic operation circuit 12.
In the microcontroller of FIG. 2, a counter 25 waiting for clock generation to be stabilized is provided in order to wait for the operation of the clock generation circuit 10 to be stabilized upon the power on of the microcontroller. The counter 25 is reset by a reset signal "1" from the node 15, and, then, starts counting the clock signal generated by the clock generation circuit 10. When a count has exceeded a predetermined number, the counter 25 sets a start-up flip-flop 26 provided for the reset elongating circuit 16. The setting of the flip-flop 26 triggers the start of the reset elongating circuit 16, which elongates the reset signal to provide the elongated reset signal for the logic operation circuit 12 and the AND circuit 23.
In the prior-art circuits shown in FIG. 1 and FIG. 2, the nodes 17 to 19 are allocated for the setting of the operation modes, i.e., an operation mode is selected based on signal levels of the nodes 17 to 19 at the time of a reset. In general, there is a restriction on a number of the external nodes which can be provided on a microcontroller chip, often because only a limited space is available at a time of implementation. However, the larger the number of test items which can be set by external nodes, the easier it is to conduct a test. Thus, there are conflicting demands, one for a simplicity in the setting of the operation modes and the other for a smaller number of external nodes.
Also, the prior-art circuit shown in FIG. 2 is provided with the counter 25 for waiting for the clock generation to be stabilized and with the flip-flop 26 to be set by the counter 25. Thus, when a mode is switched at reset from an operation mode to a test mode, the test cannot be conducted in a period during which the counter 25 keeps count of the clock signal. This leads to an increase in a time required for the test.
Accordingly, there is a need in the field of microcontrollers for a microcontroller in which a number of bits representing mode signals for setting operation modes can be increased without increasing a number of external nodes, and, also, a time required for a test can be reduced by eliminating a waiting period for clock generation to be stabilized.